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udara posted an update 10 months ago
Restarting development of ChipHackers after a year
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udara posted an update in the group
Hackathons 1 year ago
RTL playground is a beta version of the RTL hackathon. Try it out !!!
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udara edited the doc Training Program 2 years ago
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udara created the doc Training Program 2 years ago
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udara and
rameshfdo are now friends 2 years ago
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udara and
savinduherath are now friends 2 years ago
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achinthairoshan and
udara are now friends 2 years ago
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udara edited the doc Learning Portal Development Project 2 years ago
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udara created the doc Learning Portal Development Project 2 years ago
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udara created the group
Hackathons 2 years ago
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udara edited the doc Introduction to Checkers 2 years ago
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udara created the doc Introduction to Checkers 2 years ago
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udara and
viduneth are now friends 2 years ago
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udara posted an update in the group
RISC-V 2 years ago
Need to update the spec for
» AtomRV32 Design SpecificationsIntroduction AtomRV32 is a CPU based on RISC-V instruction set architecture. The motivation behind AtomRV32 is designing a very simple CPU that is easy to learn and adopt. Status This project is in pre-Alpha… -
udara and
sasindu are now friends 2 years ago
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udara created the group
RISC-V 2 years ago
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udara started the topic Cache for RISC V in the forum RISC-V 2 years ago
What should be the specifications for first level cache which can be used with RISC-V processor
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udara and
vithurson are now friends 2 years ago
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udara replied to the topic Develop a new RISC-V Core in the forum RISC-V 2 years ago
Hi All,
Please review the draft architecture inspired by lowRISC architecture. Suggest the edits needed. (You can edit the original document itself if you like to add something. )
https://chiphackers.com/docs/atomrv32/
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udara changed their profile picture 2 years ago
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