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Profile picture of udara

@udara

active 5 days ago
Restarting development of ChipHackers after a year View
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  • Profile picture of udara

    udara posted an update 1 week ago

    Restarting development of ChipHackers after a year

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    udara created the group Group logo of freedom-phonefreedom-phone 1 week ago

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    udara posted an update in the group Group logo of HackathonsHackathons 8 months ago

    RTL playground is a beta version of the RTL hackathon. Try it out !!!

    ChipHackers
    https://hackathons.chiphackers.com/rtl-playground
    ChipHackers

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    udara edited the doc Training Program 1 year ago

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    udara created the doc Training Program 1 year ago

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    udara and Profile picture of rameshfdorameshfdo are now friends 1 year ago

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    udara and Profile picture of savinduherathsavinduherath are now friends 1 year ago

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    achinthairoshan and Profile picture of udaraudara are now friends 1 year ago

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    udara edited the doc Learning Portal Development Project 2 years ago

  • Profile picture of udara

    udara created the doc Learning Portal Development Project 2 years ago

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    udara created the group Group logo of HackathonsHackathons 2 years ago

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    udara edited the doc Introduction to Checkers 2 years ago

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    udara created the doc Introduction to Checkers 2 years ago

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    udara and Profile picture of vidunethviduneth are now friends 2 years ago

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    udara posted an update in the group Group logo of RISC-VRISC-V 2 years ago

    Need to update the spec for

    » AtomRV32 Design Specifications
    https://chiphackers.com/docs/atomrv32/
    Introduction AtomRV32 is a CPU based on RISC-V instruction set architecture. The motivation behind AtomRV32 is designing a very simple CPU that is easy to learn and adopt. Status This project is in pre-Alpha…

    [Read more]

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    udara and Profile picture of sasindusasindu are now friends 2 years ago

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    udara created the group Group logo of RISC-VRISC-V 2 years ago

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    udara started the topic Cache for RISC V in the forum RISC-V 2 years ago

    What should be the specifications for first level cache which can be used with RISC-V processor

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    udara and Profile picture of vithursonvithurson are now friends 2 years ago

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    udara replied to the topic Develop a new RISC-V Core in the forum RISC-V 2 years ago

    Hi All,

    Please review the draft architecture inspired by lowRISC architecture. Suggest the edits needed. (You can edit the original document itself if you like to add something. )

    https://chiphackers.com/docs/atomrv32/

     

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